Assertion Based Verification of AMBA-AHB Using Synopsys VCS®
نویسندگان
چکیده
The successof assertion based functional verification depends on the debugging environment associated with it. It helps user to get information about the environment in a refined manner. It also helps in realizing visualization support which tracks the behavioral aspects of the design under verification. This paper presents the design and verification of widely used AdvancedHigh-performanceBus(AHB)protocoloftheAdvancedMicroprocessorBusArchitecture(AMBA) using Assertion Based Functional Verification approach.This paper contributes as follows: (1) Designing of AMBA AHB protocol using System Verilog language in Synopsys VCS® tool. (2) Implementing assertion for different components of the design. (3) Functional verification of the overall design using all the assertions and analyzing the obtained coverage report. Hence, with this systematic description of the work done, we are able to automatically and completely synthesize and functionally verify an important and widely used industrial protocol.
منابع مشابه
HPChecker: An AMBA AHB On-Chip Bus Protocol Checker with Efficient Verification Mechanisms
Bus-based system-on-a-chip (SoC) design has become the major integrated methodology for shortening SoC design time. The main challenge is how to verify on-chip bus protocols efficiently. Although traditional simulation-based bus protocol monitors can check whether bus signals obey bus protocol or not. They are still lack of an efficient bus protocols verification environment such as FPGA-level ...
متن کاملAMCC Speeds Verification Using Synopsys' VCS Solution With SystemVerilog and e Testbench Migration Service
Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that Applied Micro Circuits Corp. (AMCC) (NASDAQ: AMCC), a global leader in network and embedded PowerPC processing, optical transport and storage solutions, has adopted SystemVerilog for testbench automation using Synopsys' VCS® comprehensive RTL verification solution. Using the reference methodolog...
متن کاملFormalization and Verification of the Amba Ahb Communication Architecture Using the Acl2 Theorem Prover
In this paper, we apply a method, based on an automatic theorem prover, to reach correct formal descriptions of communication systems. This allows the verification of the correctness of systems at the first step of their design. Moreover, the prover has reasoning capabilities that do not require fixed size systems, and large parameterized architectures, like IPs or SoCs can be modeled and prove...
متن کاملSynthesis of AMBA AHB from Formal Specification
The standard procedure for hardware design consists of describing circuit in a hardware description language at logic level followed by extensive verification and logic-synthesis. However, this process consumes significant time and needs a lot of effort. An alternative is to use formal specification language as a high-level hardware description language and synthesize hardware from formal speci...
متن کاملDesign and Verification of AMBA AHB- Lite protocol using Verilog HDL
The SOC plan confronts a crevice between generation limit and time to market weights. The outline space develops with changes underway limits as far as measure of time to plan a framework utilizing these abilities. On one hand, shorter product life cycles are forcing an aggressive reduction of the time-to-market, fast simulation capabilities are required for coping with the immense design space...
متن کامل